Design and Implementation of Program Control Filter Based on Single Chip Microcomputer and FPGA

A filter is a device used to eliminate interfering noise and can be used to effectively filter out frequencies at a particular frequency or frequencies outside of that frequency. It occupies a very important position in the electronics field and has been widely used in signal processing, anti-interference processing, power systems, and anti-aliasing processing. For the programmable filter, the biggest feature of the system is that its filtering mode can be selected by program control, and the -3dB cutoff frequency program control is adjustable, which is equivalent to a multi-function integrated filter, which will have better application prospects. In addition, the system has the function of amplitude-frequency characteristic test, and displays the spectral characteristics through an oscilloscope, which can intuitively reflect the filtering effect.

1 program argumentation and choice

1.1 Design and demonstration of variable gain amplification module

Option 1: The digital potentiometer controls the two-stage INA129 cascade. The digital potentiometer DS1267 is controlled by the FPGA to output different resistance values, which is used as the feedback resistor of the high precision instrumentation amplifier INA129. The gain of the amplifier can be adjusted by controlling the digital potentiometer to change the amplification factor of the INA129.

Option 2: Implemented with a variable gain amplifier AD603. The variable gain amplifier is internally composed of an R-2R ladder resistor network and a fixed gain amplifier. The signal applied to the input of the ladder network is attenuated and output by a fixed gain amplifier. The attenuation is determined by the reference voltage applied to the gain control interface. It can be controlled by a single-chip microcomputer, and the DAC generates an accurate reference voltage control gain, thereby achieving more accurate numerical control.

Since the input sinusoidal small signal amplitude is 10mV, the voltage gain is 60dB, the 10dB step process is adjustable, and the voltage gain error cannot be greater than 5%. Both schemes can be implemented for accuracy, and a magnification of 60 dB can be achieved by adding a first-order amplification after AD603. However, the internal structure of the digital potentiometer is complicated and has the influence of capacitance. After the subsequent stage is connected to the operational amplifier, it will bring unintended consequences, so the scheme 2 is adopted.

1.2 Filter module design and demonstration

Option 1: Use a digital filter. Design FIR or IIR filters using MATLAB's digital filters. Digital filters have the advantages of high precision and good cut-off characteristics. However, the FIR filter occupies too much FPGA resources. The IIR filter is designed with large workload and low stability. To make the cutoff frequency adjustable, different parameters must be used, and the software is designed to be large.

Option 2; using a passive LC filter. Various types of filters can be built using inductors and capacitors. The ideal filter can be easily designed with reference to the relevant parameters in the filter design manual. However, if the cutoff frequency is adjustable, the hardware can be very complicated only by changing the inductance and capacitance parameters.

Option 3: Use an integrated switched capacitor filter chip. The switched capacitor filter is a large scale integrated circuit filter composed of a MOS switch, a MOS capacitor, and a MOS operational amplifier. The switched capacitor group can be equivalent to an equivalent resistance related to the clock frequency driven by the clock frequency. When the external clock is changed, the equivalent resistance changes, which changes the filter's time and changes the filter characteristics. Switched-capacitor filters can directly process analog signals without the need for A/D and D/A conversions like digital filters, simplifying circuit design and improving system reliability.

In summary, the system adopts scheme 3, realizes low-pass filter by using integrated chip MAX297, realizes high-pass filter by LTC1068, and implements fourth-order elliptical low-pass filter by passive LC filter technology by scheme 2.

2 system overall design and implementation block diagram

The system is composed of a single-chip microcomputer and an FPGA, and is composed of a controllable gain amplification module, a program-controlled filter module and an amplitude-frequency characteristic test module. The system block diagram is shown in Figure 1. The input signal with amplitude of 1V is attenuated by the voltage divider network and becomes a small signal with an amplitude of 10mV. It is amplified twice by the preamplifier of OPA690, and plays the role of impedance transformation and isolation. At the same time, the sinusoidal signal of a set frequency is generated by the AD9851, and is sent to the subsequent stage through the analog switch. The signal is controlled by the program AD603 to perform an adjustable gain amplification of 0 to 60 dB, and then sent to the filter module. The filtering module includes a low-pass, high-pass, elliptical filter, wherein the low-pass, high-pass is controlled by a program-controlled -3dB cutoff frequency in the range of 1 to 30 kHz, stepped at 1 kHz. The elliptical filter has a cutoff frequency of 50 kHz. Then, the specific filter signal output is selected by the analog switch, and then sent to the FPGA for amplitude-frequency characteristic test after RMS detection and A/D conversion, and then the two-band DAC0800 is used to realize the display of the amplitude-frequency characteristic curve.

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